Microelectronic devices, micromechanical devices, and other types of devices with microfeatures are typically formed by constructing several layers of components on a workpiece. Microelectronic devices, for example, are typically formed by fabricating a plurality of dies on a single workpiece. Each die can include a plurality of bond-pads coupled to an integrated circuit. The dies are separated from each other after fabrication and packaged to form individual microelectronic devices that can be attached to modules or installed in other electronic products.
The dies described above typically include conductive interconnects to electrically couple components located in different layers of the die. In some applications, it may be desirable to form interconnects that extend completely through the die or through a significant portion of the die. Such interconnects can be used to electrically couple bond-pads or other conductive elements on one side of the die to conductive elements on the other side of the die. Through-wafer interconnects, for example, are constructed by forming deep vias on the front side and/or backside of the wafer in alignment with bond-pads on the front side of the wafer. The vias are often “blind” vias in that they are closed at one end. The blind vias are then filled with a conductive material. After further processing, the wafer is thinned to reduce the final die thickness. Solder balls or other external electrical contacts can be attached to the through-wafer interconnects at the backside and/or the front side of the wafer to facilitate subsequent packaging. The solder balls and other external contacts can be attached either before or after singulating the dies from the wafer.
One shortcoming of prior art methods for forming through-wafer interconnects is that it is often difficult to fill deep, narrow blind vias with electrically conductive material. In most processes using solder, for example, an oxide reducing agent or flux is used on a layer of nickel within the blind via to remove oxides from the nickel and to prevent the nickel and other materials in the via (e.g., solder) from forming oxides. When the molten solder enters the blind via, the oxide reducing agent produces gases that can be trapped in the closed end of the blind via. These gases can produce undesirable voids or other discontinuities in the interconnect. In addition, the oxide reducing agent itself may be trapped in the fill material and cause additional voids or irregular regions within the interconnect.
Another shortcoming of prior art methods for forming through-wafer interconnects is that vapor deposition processes may produce non-uniform seed layers on the sidewalls of the vias. This can affect subsequent plating processes in high aspect ratio holes because the nonuniform seed layers cause the plating rate to be higher at the openings than deep within the vias. The electroplating processes, for example, may “pinch-off” the openings of high aspect ratio holes before the holes are filled completely. In view of these shortcomings with prior art methods, there is a need to more effectively form interconnects in blind vias and other deep holes in microfeature workpieces.